Data transfer rates for aggregated video data stream and within data centers nowadays require an electrical bandwidth up to 100 GHz. This poses big challenges for the design of proper test and measurement solutions, notably related to the acquisition of signals with such a wide bandwidth. To grant sufficient bandwidth and related sample rate, modern oscilloscopes have been using techniques based on frequency-interleaving and time-interleaving, respectively. Earlier this year, an alternative technique has been presented in a white paper [1],[2] based on which an oscilloscope that can offer an electrical bandwidth that is two times that of the adopted ADC has been launched. This result is obtained by combining the operations of a couple of time interleaved channels, each one made up of a mixer followed by an ADC. The paper presents a synchronous time interleaving technique, which can be regarded as an extension of the aforementioned technique. In fact, the proposed technique can be implemented through an architecture that includes four channels, each one including a mixer and an ADC, the latter having an input bandwidth equal to just one fourth the electrical bandwidth achieved by the system.

A proposal for DSO bandwidth extension through synchronous time interleaving

Vadursi, Michele
2016-01-01

Abstract

Data transfer rates for aggregated video data stream and within data centers nowadays require an electrical bandwidth up to 100 GHz. This poses big challenges for the design of proper test and measurement solutions, notably related to the acquisition of signals with such a wide bandwidth. To grant sufficient bandwidth and related sample rate, modern oscilloscopes have been using techniques based on frequency-interleaving and time-interleaving, respectively. Earlier this year, an alternative technique has been presented in a white paper [1],[2] based on which an oscilloscope that can offer an electrical bandwidth that is two times that of the adopted ADC has been launched. This result is obtained by combining the operations of a couple of time interleaved channels, each one made up of a mixer followed by an ADC. The paper presents a synchronous time interleaving technique, which can be regarded as an extension of the aforementioned technique. In fact, the proposed technique can be implemented through an architecture that includes four channels, each one including a mixer and an ADC, the latter having an input bandwidth equal to just one fourth the electrical bandwidth achieved by the system.
2016
9781467392204
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11367/69529
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